(a) Field of the Invention
The present invention relates to manufacturing methods of liquid crystal displays (hereinafter “LCD”).
(b) Description of the Related Art
In general, a liquid crystal display includes two panels, a liquid crystal material interposed therebetween, and electrodes formed on the inner surfaces of the panels to control a photo transmittance for adjusting the voltage applied.
A pixel electrode made of a transparent conductive material such as ITO (indium tin oxide) and displaying images is located in each pixel region of the liquid crystal display. The pixel electrode is driven by signals supplied from signal lines such as gate lines and data lines defining the pixel regions. In detail, the pixel electrode is connected to the signal lines via a switching device such as thin film transistor (hereinafter “TFT”). The switching device controls image signals supplied from the data line to output to the pixel electrode responsive to scanning signals supplied from the gate line. Furthermore, a storage line for storing the image signal supplied to the pixel electrode until the next image signal is applied.
Generally, a positive photoresist is used, when patterning a transparent conductive layer to form the pixel electrode.
However, if particles which block the light incident to the photoresist are placed on the photoresist between the pixel regions, the portions of the positive photoresist under the particles are not removed after development. As a result, conductive patterns between the pixel regions may be remained, and the pixel electrodes in the adjacent pixel regions may be shorted through the conductive patterns.
In the mean time, in order to increase the aperture ratio of the LCD, the pixel electrode and the signal lines may align with each other. However, considering aligning margin of manufacturing process, the pixel electrode and the data line may overlap, and the considerable parasitic capacitance generated therebetween increases.
To decrease this parasitic capacitance, the thickness of an insulating layer interposed between the pixel electrode and the data line may increase. However, this may cause the storage capacitance between the pixel electrode and the storage line to decrease.
Furthermore, in case of using a stepper as an exposure device to exposing the photoresist in unit of block, if misalign is generated between the blocks, the overlapping area of the pixel electrode and the data line is different between the blocks. Accordingly, the parasitic capacitance is different between the blocks.